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dual-channel, 5 kv isolators with integrated dc-to-dc converter data sheet adum6200 / ADUM6201 / adum6202 rev. c information furnished by analog devices is believed to be accurate and reliable. however, no responsibility is assumed by analog devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. specifications subject to change without notice. no license is granted by implication or otherwise under any patent or patent rights of analog devices. trademarks and registered trademarks are the property of their respective owners. one technology way, p.o. box 9106, norwood, ma 02062-9106, u.s.a. tel: 781.329.4700 www.analog.com fax: 781.461.3113 ?2010C2012 analog devices, inc. all rights reserved. features iso power integrated, isolated dc-to-dc converter regulated 5 v or 3.3 v output up to 400 mw output power dual dc-to-25 mbps (nrz) signal isolation channels 16-lead soic wide body package version 16-lead soic wide body enhanced creepage version high temperature operation: 105c maximum safety and regulatory approvals ul recognition 5000 v rms for 1 minute per ul 1577 csa component acceptance notice #5a iec 60601-1: 250 v rms, 8 mm package (ri-16-1) iec 60950-1: 400 v rms, 8 mm package (ri-16-1) vde certificate of conformity (rw-16) iec 60747-5-2 (vde 0884 part 2):2003-01 v iorm = 846 v peak vde certificate of conformity, 8 mm package (ri-16-1) din v vde v 0884-10 (vde v 0884-10):2006-12 v iorm = 846 v peak applications rs-232/rs-422/rs-485 transceivers industrial field bus isolation isolated sensor interfaces industrial plcs general description the adum6200 / ADUM6201/ adum6202 1 are dual-channel digital isolators with iso power?, an integrated, isolated dc-to-dc converter. based on the analog devices, inc., i coupler? technology, the dc-to-dc converter provides up to 400 mw of regulated, iso- lated power at either 5.0 v or 3.3 v from a 5.0 v input supply, or at 3.3 v from a 3.3 v supply at the power levels shown in table 1. these devices eliminate the need for a separate, isolated dc-to-dc converter in low power, isolated designs. the i coupler chip scale transformer technology is used to isolate the logic signals and for the magnetic components of the dc-to-dc converter. the result is a small form factor, total isolation solution. the adum6200 / ADUM6201/ adum6202 isolators provide two independent isolation channels in a variety of channel configura- tions and data rates (see the ordering guide for more information). iso power uses high frequency switching elements to transfer power through its transformer. special care must be taken during printed circuit board (pcb) layout to meet emissions standards. see the an-0971 application note for board layout recommendations. functional block diagrams 08775-001 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 oscillator nc = no connect rectifier 2-channel i coupler core v dd1 regulator gnd 1 v ia /v oa v ib /v ob rc in rc sel v e1 /nc gnd 1 v iso gnd iso v ia /v oa v ib /v ob nc v sel v e2 /nc gnd iso adum6200/ ADUM6201/ adum6202 figure 1. 3 4 14 13 adum6200 v ia v ib v oa v ob 08775-002 figure 2. adum6200 3 4 14 13 ADUM6201 v ia v ob v oa v ib 08775-003 figure 3. ADUM6201 3 4 14 13 adum6202 v oa v ob v ia v ib 08775-004 figure 4. adum6202 table 1. power levels input voltage (v) output voltage (v) output power (mw) 5.0 5.0 400 5.0 3.3 330 3.3 3.3 132 1 protected by u.s. patents 5,952,849; 6,873,065; 6,903,578; and 7,075,329; other patents are pending. free datasheet http:///
adum6200/ADUM6201/adum6202 data sheet rev. c | page 2 of 28 tabl e of contents features .............................................................................................. 1 applications ....................................................................................... 1 general description ......................................................................... 1 functional block diagrams ............................................................. 1 revision history ............................................................................... 2 specifications ..................................................................................... 3 electrical characteristics 5 v primary input supply/ 5 v secondary isolated supply ................................................... 3 electrical characteristics 3.3 v primary input sup ply/ 3.3 v secondary isolated supply ................................................ 4 electrical characteristics 5 v primary input supply/ 3.3 v secondary isolated supply ................................................ 6 pa ckage characteristics ............................................................... 7 regulatory information ............................................................... 8 insulation and safety - related specifications ............................ 8 insulation characteristics ............................................................ 9 recommended operating conditions ...................................... 9 absolute maximum ratings .......................................................... 10 esd caution ................................................................................ 10 pin configurations and function descriptions ......................... 11 trut h table .................................................................................. 13 typical performance characteristics ........................................... 14 terminology .................................................................................... 17 applications information .............................................................. 18 pcb layout ................................................................................. 18 start - up behavior ....................................................................... 18 emi considerations ................................................................... 19 propagation delay parameters ................................................. 19 dc correctness and magnetic field immunity ..................... 19 power consumption .................................................................. 20 current - limit and thermal overload protection ................. 21 power considerations ................................................................ 21 thermal analysis ....................................................................... 22 increasing available power ....................................................... 22 insulation l ifetime ..................................................................... 23 outline dimensions ....................................................................... 24 ordering guide .......................................................................... 25 revision history 6/12 rev. b to rev. c crea ted hyperlink for safety and regulatory approvals entry in features section ................................................................. 1 changes to table 15 .......................................................................... 8 changes to insulation characteristics section ............................. 9 8/11 rev. a to rev. b change to features section ............................................................. 1 changes to table 15 .......................................................................... 8 8/11 rev. 0 to rev. a added 16- l ead soic (ri - 16- 1 ) package ........................ universal changes to features section ............................................................ 1 changes to table 15 and table 16 .................................................. 8 changes to table 20 ........................................................................ 10 1 0 / 10 revision 0: initial version free datasheet http:///
data sheet adum6200/ADUM6201/adum6202 rev. c | page 3 of 28 specifications electrical character istics 5 v primary input su pply/5 v secondary i solated sup ply t ypical specifications are at t a = 25c, v dd1 = v sel = v iso = 5 v. minimum/maximum specifications apply over the entire recommended operation range , which is 4.5 v v dd1 , v sel , v iso 5.5 v , and ?40c t a + 105c, unless otherwise noted. switching specifications are tested with c l = 15 pf and cmos signal levels, unless otherwise noted . table 2 . dc -to - dc converter static specifications parameter symbol min typ max unit test conditions /comments dc - to - dc converter supply setpoint v iso 4.7 5.0 5.4 v i iso = 0 ma line regulation v iso (line) 1 mv/v i iso = 4 0 ma, v dd1 = 4.5 v to 5.5 v load regulation v iso(load) 1 5 % i iso = 8 ma to 72 ma output ripple v iso(rip) 75 mv p -p 20 mhz bandwidth, c bo = 0.1 f||10 f, i iso = 72 ma output noise v iso(noise) 200 mv p -p c bo = 0.1 f||10 f, i iso = 72 ma switching frequency f osc 180 mhz pwm frequency f pwm 625 khz output su pply curr ent i iso(max) 80 ma v iso > 4.5 v efficiency at i iso (max) 32 % i iso = 8 0 ma i dd1 , no v iso load i dd1(q) 1 0 26 ma i dd1 , full v iso load i dd1(max) 290 ma table 3 . dc -to - dc converter dynamic specifications parameter symbol 1 mbps a or c grade 25 mbps c grade unit test conditions/ comments min typ max min typ max supply current input i dd1(d) adum6200 9 34 ma no v iso load ADUM6201 10 38 ma no v iso load adum6202 11 41 ma no v iso load available to load i iso(load) adum6200 8 0 7 4 ma ADUM6201 80 7 2 ma adum6202 80 7 0 ma table 4 . switching specifications parameter symbol a grade c grade unit test conditions / comments min typ max min typ max switching specifications data rate 1 25 mbps within pwd limit propagation delay t phl , t plh 55 100 45 6 0 ns 50% input to 50% output pulse width distortion pwd 40 6 ns | t plh ? t phl | change vs. temperature 5 ps/c pulse width pw 1000 40 ns within pwd limit propagation delay skew t psk 50 15 ns between any two units channel matching codirectional 1 t pskcd 50 6 ns opposing directiona l 2 t pskod 50 15 ns 1 7 codirectional channel matching is the absolute value of the difference in propagation delays between any two channels with in puts on the same side of the isolation barrier. 2 opposing directional channel matching is the absolute value of the difference in propagation delays between any two channels with inputs on opposite sides of the isolation barrier. free datasheet http:///
adum6200/ADUM6201/adum6202 data sheet rev. c | page 4 of 28 table 5 . input and output characteristics parameter symbol min typ max unit test conditions / comments dc specifications logic high input threshold v ih 0.7 v iso or 0.7 v dd1 v logic low input threshold v il 0.3 v iso or 0.3 v dd1 v logic high output voltages v oh v dd1 ? 0.3 or v iso ? 0.3 5.0 v i ox = ?20 a, v ix = v ixh v dd1 ? 0.5 or v iso ? 0.5 4.8 v i ox = ?4 ma, v ix = v ixh logic low output voltages v ol 0.0 0.1 v i ox = 20 a, v ix = v ixl 0.2 0.4 v i ox = 4 ma, v ix = v ixl undervoltage lockout uvlo v dd1 , v iso supplies positive - going threshold v uv+ 2.7 v negative - going threshold v uv? 2.4 v hyster e sis v uvh 0.3 v input currents per channel i i ?20 +0.01 +20 a 0 v v ix v dd 1 ac specifications o utput rise/fall time t r /t f 2.5 ns 10% to 90% common - mode transient immunity 1 |cm| 25 35 kv/s v ix = v dd1 or v iso , v cm = 1000 v, transient magnitude = 800 v refresh rate f r 1.0 mbps 1 |cm| is the maximum common - mode voltage slew rate that can be sustained while maintaining v o > 0. 7 v dd1 or 0. 7 v iso for a high input or v o < 0. 3 v dd1 or 0. 3 v iso for a low input. the common - mode voltage slew rates apply to both rising and falling common - mode voltage edges. electrical character istics 3.3 v primary input supply/3.3 v sec ondary isolated supp ly t ypical specifications are at t a = 25c, v dd1 = v iso = 3.3 v, v sel = gnd iso . minimum/maximum specifications apply over the entire recommended operation range , which is 3.0 v v dd1 , v sel , v iso 3.6 v , and ?40c t a + 105c , unless otherwise noted. switching specifications are tested with c l = 15 pf and cmos signal levels, unless otherwise noted. table 6 . dc -to - dc converter static specifications pa rameter symbol min typ max unit test conditions/comments dc - to - dc converter supply setpoint v iso 3.0 3.3 3. 6 v i iso = 0 ma line regulation v iso(line) 1 mv/v i iso = 2 0 ma, v dd1 = 3.0 v to 3.6 v load regulation v iso(load) 1 5 % i iso = 4 ma to 36 ma output ripple v iso(rip) 50 mv p - p 20 mhz bandwidth, c bo = 0.1 f||10 f, i iso = 36 ma output noise v iso(noise) 130 mv p -p c bo = 0.1 f||10 f, i iso = 36 ma switching frequency f osc 180 mhz pwm frequency f pwm 625 khz output supply current i iso(max) 4 0 ma v iso > 3 v efficiency at i iso(max) 29 % i iso = 4 0 ma i dd1 , no v iso load i dd1(q) 10 1 7 ma i dd1 , full v iso load i dd1(max) 175 ma free datasheet http:///
data sheet adum6200/ADUM6201/adum6202 rev. c | page 5 of 28 table 7 . dc -to - dc converter dynamic specifications parameter symbol 1 mb ps a or c grade 25 mbps c grade unit test conditions/ comments min typ max min typ max supply current input i dd1(d) adum6200 6 23 ma no v iso load ADUM6201 7 25 ma no v iso load adum6202 8 27 ma no v iso load available to load i iso(load) adum6200 4 0 3 6 ma ADUM6201 40 3 5 ma adum6202 40 3 4 ma table 8 . switching specifications parameter symbol a grade c grade unit test conditions/ comm ents min typ max min typ max switching specifications data rate 1 25 mbps within pwd limit propagation delay t phl , t plh 60 100 45 6 5 ns 50% input to 50% output pulse width distortion pwd 40 6 ns | t plh ? t phl | change vs. temper ature 5 ps/c pulse width pw 1000 40 ns within pwd limit propagation delay skew t psk 50 45 ns between any two units channel matching codirectional 1 t pskcd 50 6 ns opposing directional 2 t pskod 50 15 ns 1 7 codirectional channel matching is the absolute value of the difference in propagation delays betw een any two channels with inputs on the same side of the isolation barrier. 2 opposing directional channel matching is the absolute value of the difference in propagation delays between any two channels with inputs on opposite sides of the isolation barrie r. table 9 . input and output characteristics parameter symbol min typ max unit test conditions/ comments dc specifications logic high input threshold v ih 0.7 v iso or 0.7 v dd1 v logic low input threshold v il 0.3 v iso or 0.3 v dd 1 v logic high output voltages v oh v dd1 ? 0.3 or v iso ? 0.3 3.3 v i ox = ?20 a, v ix = v ixh v dd1 ? 0.5 or v iso ? 0.5 3.1 v i ox = ?4 ma, v ix = v ixh logic low output voltages v ol 0.0 0.1 v i ox = 20 a, v ix = v ixl 0.0 0.4 v i ox = 4 ma, v ix = v ixl undervoltage lockout uvlo v dd1 , v iso supplies positive - going threshold v uv+ 2.7 v negative - going threshold v uv? 2.4 v hysteresis v uvh 0.3 v input currents per channel i i ?20 +0.01 +20 a 0 v v ix v dd 1 ac specifications output rise/fall time t r /t f 2.5 ns 10% to 90% common - mode transient immunity 1 |cm| 25 35 kv/s v ix = v dd1 or v iso , v cm = 1000 v, transient magnitude = 800 v refresh rate f r 1.0 mbps 1 |cm| is the maximum common - mode voltage slew rate that can be sustained while maintaining v o > 0. 7 v dd1 or 0. 7 v iso for a high input or v o < 0. 3 v dd1 or 0. 3 v iso for a low input. the common - mode voltage slew rates apply to both rising and fall ing common - mode voltage edges. free datasheet http:///
adum6200/ADUM6201/adum6202 data sheet rev. c | page 6 of 28 electrical character istics 5 v primary input su pply/3.3 v secondary is olated supply t ypical specifications are at t a = 25c, v dd1 = 5.0 v, v iso = 3.3 v , v sel = gnd iso . minimum/maximum specifications apply over the entire recommended operation range , which is 4.5 v v dd1 5.5 v, 3.0 v v iso 3.6 v, and ? 40c t a + 105c, unless otherwise noted. switching specifications are tested with c l = 15 pf and cmos signal levels, unless otherwise noted. table 10 . dc -to - dc converter static spe cifications parameter symbol min typ max unit test conditions/comments dc - to - dc converter supply setpoint v iso 3.0 3.3 3. 6 v i iso = 0 ma line regulation v iso(line) 1 mv/v i iso = 50 ma, v dd1 = 3.0 v to 3.6 v load regulation v iso(load) 1 5 % i is o = 6 ma to 54 ma output ripple v iso(rip) 50 mv p -p 20 mhz bandwidth, c bo = 0.1 f||10 f, i iso = 90 ma output noise v iso(noise) 130 mv p -p c bo = 0.1 f||10 f, i iso = 90 ma switching frequency f osc 180 mhz pwm frequency f pwm 625 khz output supply current i iso(max) 100 ma v iso > 3 v efficiency at i iso(max) 25 % i iso = 10 0 ma i dd1 , no v iso load i dd1(q) 7 1 3 ma i dd1 , full v iso load i dd1(max) 230 ma table 11 . dc -to - dc converter dynamic specifications parame ter symbol 1 mbps a or c grade 25 mbps c grade unit test conditions/ comments min typ max min typ max supply current input i dd1(d) adum6200 6 22 ma no v iso load ADUM6201 6 23 ma no v iso load adum6202 6 24 ma no v iso load available to load i iso(load) adum6200 100 9 6 ma ADUM6201 100 95 ma adum6202 100 94 ma table 12 . switching specifications parameter symbol a grade c grade unit te st conditions/ comments min typ max min typ max switching specifications data rate 1 25 mbps within pwd limit propagation delay t phl , t plh 60 100 45 6 5 ns 50% input to 50% output pulse width distortion pwd 40 6 ns |t plh ? t phl | change vs. temperature 5 ps/c pulse width pw 1000 40 ns within pwd limit propagation delay skew t psk 50 15 ns between any two units channel matching codirectional 1 t pskcd 50 6 ns opposing directional 2 t pskod 50 15 n s 1 7 codirectional channel matching is the absolute value of the difference in propagation delays between any two channels with in puts on the same side of the isolation barrier. 2 opposing directional channel matching is the ab solute value of the difference in propagation delays between any two channels with inputs on opposite sides of the isolation barrier. free datasheet http:///
data sheet adum6200/ADUM6201/adum6202 rev. c | page 7 of 28 table 13. input and output characteristics parameter symbol min typ max unit test conditions/comments dc specifications logic high input threshold v ih 0.7 v iso or 0.7 v dd1 v logic low input threshold v il 0.3 v iso or 0.3 v dd1 v logic high output voltages v oh v dd1 ? 0.3 or v iso ? 0.3 v dd1 or v iso v i ox = ?20 a, v ix = v ixh v dd1 ? 0.5 or v iso ? 0.5 v dd1 ? 0.2 or v iso ? 0.2 v i ox = ?4 ma, v ix = v ixh logic low output voltages v ol 0.0 0.1 v i ox = 20 a, v ix = v ixl 0.0 0.4 v i ox = 4 ma, v ix = v ixl undervoltage lockout uvlo v dd1 , v iso supplies positive-going threshold v uv+ 2.7 v negative-going threshold v uv? 2.4 v hysteresis v uvh 0.3 v input currents per channel i i ?20 +0.01 +20 a 0 v v ix v dd1 ac specifications output rise/fall time t r /t f 2.5 ns 10% to 90% common-mode transient immunity 1 |cm| 25 35 kv/s v ix = v dd1 or v iso , v cm = 1000 v, transient magnitude = 800 v refresh rate f r 1.0 mbps 1 |cm| is the maximum common-mode voltage slew rate that can be sustained while maintaining v o > 0.7 v dd1 or 0.7 v iso for a high input or v o < 0.3 v dd1 or 0.3 v iso for a low input. the common-mode voltage slew rates apply to both rising and falling common-mode voltage edges. package characteristics table 14. parameter symbol min typ max unit test conditions/comments resistance and capacitance resistance (input-to-output) 1 r i-o 10 12 capacitance (input-to-output) 1 c i-o 2.2 pf f = 1 mhz input capacitance 2 c i 4.0 pf ic junction-to-ambient thermal resistance ja 45 c/w thermocouple is located at the center of the package underside; test conducted on a 4-layer board with thin traces 3 thermal shutdown thermal shutdown threshold ts sd 150 c t j rising thermal shutdown hysteresis ts sd-hys 20 c 1 this device is considered a 2-terminal device; pin 1 through pin 8 are shorted together, and pin 9 through pin 16 are shorted together. 2 input capacitance is from any input data pin to ground. 3 refer to the thermal analysis section for thermal model definitions. free datasheet http:///
adum6200/ADUM6201/adum6202 data sheet rev. c | page 8 of 28 regulatory information the adum6200 / ADUM6201/ adum6202 are approved by the organizations listed in table 15. refer to table 20 and the insulation lifetime section for more information about the recommended maximum working voltages for specific cross-insulation waveforms and insulat ion levels. table 15. ul 1 csa vde recognized under ul 1577 component recognition program approved under csa component acceptance notice #5a rw-16 package: 2 certified according to iec 60747-5-2 (vde 0884 part 2):2003-01 basic insulation, 846 v peak single protection, 5000 v rms isolation voltage basic insulation per csa 60950-1-07 and iec 60950-1, 600 v rms (848 v peak) maximum working voltage ri-16-1 package: 3 certified according to din v vde v 0884-10 (vde v 0884-10):2006-12 reinforced insulation, 846 v peak rw-16 package: reinforced insulation per csa 60950-1-07 and iec 60950-1, 380 v rms (537 v peak) maximum working voltage reinforced insulation per iec 60601-1, 125 v rms (176 v peak) maximum working voltage ri-16-1 package: reinforced insulation per csa 60950-1-07 and iec 60950-1, 400 v rms (565 v peak) maximum working voltage reinforced insulation per iec 60601-1, 250 v rms (353 v peak) maximum working voltage file e214100 file 205078 file 2471900-4880-0001 1 in accordance with ul 1577, each adum6200 / ADUM6201 / adum6202 is proof-tested by applying an insulation test voltage 6000 v rms for 1 sec (current leakage detection limit = 15 a). 2 in accordance with iec 60747-5-2 (vde 0884 part 2):2003-01, each adum6200 / ADUM6201/ adum6202 in the rw-16 package is proof-tested by applying an insulation test voltage 1590 v peak for 1 sec (partial discharge detection limit = 5 pc). the as terisk (*) marking branded on the compon ent designates iec 60747-5-2 (vde 0884 part 2):2003-01 approval. 3 in accordance with din v vde v 0884-10 (vde v 0884-10):2006-12, each adum6200/ ADUM6201/ adum6202 in the ri-16-1 package is proof-tested by applying an insulation test voltage 1590 v peak for 1 sec (partial discharge detection limit = 5 pc). the asterisk (*) marking branded on the component designates din v vde v 0884-10 (vde v 0884-10):2006-12 approval. insulation and safety-related specifications table 16. parameter symbol value unit test conditions/comments rated dielectric insulation voltage 5000 v rms 1-minute duration minimum external air gap (clearance) l(i01) 8.0 mm measured from input ter minals to output terminals, shortest distance through air minimum external tracking (creepage) l(i02) measured from input ter minals to output terminals, shortest distance path along body rw-16 package 7.6 mm ri-16-1 package 8.3 min mm minimum internal distance (internal clearanc e) 0.017 min mm distance through insulation tracking resistance (comparative tracking index) cti >175 v din iec 112/vde 0303, part 1 material group iiia material group (din vde 0110, 1/89, table 1) free datasheet http:///
data sheet adum6200/ADUM6201/adum6202 rev. c | page 9 of 28 insulation character istics iec 60747- 5 - 2 (vde 0884 part 2):2003 - 01 and din v vde v 0884 - 10 (vde v 0884 - 10):2006 - 12 th ese isolators are suitable for reinforced electrical isolation only within the safety limit data. maintenance of the safety d ata is ensured by protective circuits. the asterisk (*) marking branded on the components designates iec 60747 - 5 - 2 (vde 0884 part 2):2003 - 01 or din v vde v 0884 - 10 (vde v 0884 - 10 ):2006- 12 approval. table 17. description test conditions/comments symbol characteristic unit installation classification per din vde 0110 for rated mains voltage 300 v rms i to iv for rated mains voltage 450 v rms i to ii for rated mains voltage 600 v rms i to ii climatic classification 40/105/21 pollution degree per din vde 0110, table 1 2 maximum working insulatio n voltage v iorm 846 v peak input - to - output test voltage method b1 v iorm 1.875 = v pr , 100% production test, t m = 1 sec, partial discharge < 5 pc v pr 1590 v peak method a v pr after environmental tests subgroup 1 v iorm 1.6 = v pr , t m = 60 sec, partial discharge < 5 pc 1375 v peak after input and/or safety test s subgroup 2 and subgroup 3 v iorm 1.2 = v pr , t m = 60 sec, partial discharge < 5 pc 1018 v peak highest allowable overvoltage transient overvoltage, t tr = 10 sec v iotm 6000 v peak saf ety - limiting values maximum value allowed in the event of a failure (see figure 5 ) case temperature t s 150 c side 1 current (i dd1 ) i s1 555 ma insulation resistance at t s v io = 500 v r s >10 9 ? thermal derating curve 0 100 200 300 400 500 600 0 5 0 10 0 15 0 20 0 ambient temperature (c) safe operating v dd1 current (ma) 08775-107 figu re 5 . thermal derat ing curve, dependence of safety - limiting values on case temperature, per din en 60747 - 5- 2 recommended operatin g conditions table 18. parameter symbol min max unit test conditions/comments temperature operating temperature t a ?40 +105 c operation at 105c requires reduction of the maximum load current as specified in table 19 supply voltages each voltage is relative to its respective ground v dd1 @ v sel = 0 v v dd 1 3.0 5.5 v v dd1 @ v sel = v iso v dd 1 4.5 5.5 v free datasheet http:///
adum6200/ADUM6201/adum6202 data sheet rev. c | page 10 of 28 absolute maximum rat ings t a = 25c, unless otherwise noted. table 19. parameter rating storage temperature (t st ) ?55c to +150c ambient operating temperature (t a ) ?40c to +105c supply voltage s (v dd1 , v iso ) 1 ?0.5 v to +7.0 v input voltage (v ia , v ib , v e1 , v e2 , v sel , rc in , rc sel ) 1, 2 ?0.5 v to v ddi + 0.5 v output voltage (v oa , v ob ) 1, 2 ?0.5 v to v ddo + 0.5 v average output current per pin 3 ?10 ma to +10 ma common - mode transients 4 ?100 kv/s t o +100 kv/s 1 each voltage is relative to its respective ground. 2 v ddi and v ddo refer to the supply voltages on the input and output sides of a given channel, respectively. see the pcb layout section. 3 see figure 5 for maximum rated current values for various temperatures. 4 refers to comm on - mode transients across the iso lation barrier. common - mode transients exceeding the absolute maximum ratings may cause latch - up or perm a nent damage. stresses ab ove those listed under absolute maximum ratings may cause permanent damage to the device. this is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specificati on is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. esd caution table 20. maximum continuous working voltage 1 parameter max unit applicable certification ac voltage, bipolar waveform 424 v peak all certifications, 50 - year operation ac voltage, unipolar waveform basic insulation 600 v peak reinforced insulation 565 v peak working voltage per iec 60950 - 1 dc voltage basic insulation 600 v peak rein forced insulation 565 v peak working voltage per iec 60950 - 1 1 refers to the continuous voltage magnitude imposed across the isolation barrier. see the insulation lifetime section for more information. free datasheet http:///
data sheet adum6200/ADUM6201/adum6202 rev. c | page 11 of 28 pin configurations a nd fu nction descriptions v dd1 1 gnd 1 2 v ia 3 v ib 4 v iso 16 gnd iso 15 v oa 14 v ob 13 rc in 5 nc 12 rc se l 6 v se l 1 1 nc 7 v e2 10 gnd 1 8 gnd iso 9 adum6200 t op view (not to scale) 08775-006 nc = no connect fi gure 6. adum6200 pin configuration table 21. adum6200 pin function descriptions pin no . mnemonic description 1 v dd1 primary supply voltage , 3.0 v to 5.5 v. 2, 8 gnd 1 ground reference for the primary side of the isolator. pin 2 and pin 8 are internally connected to each other, and it is recommended that both pins be connected to a common g round. 3 v ia logic input a. 4 v ib logic input b. 5 rc in regulation control input. this pin must be connected to the rc out pin of a master iso power device or tied low. this pin must not be tied high if rc sel is low; this combination causes excessive volt age on the secondary side of the isolator , damaging the adum6200 and possibly the devices that it powers. 6 rc sel control input. determines self - regulation mode ( rc sel high) or slave mode ( rc sel low) , allowing external regulation. this pin is weakly pulled to the high state. in noisy environments, tie this pin either high or low. 7, 12 nc no internal connection. 9, 15 gnd iso ground reference for the secondary side of the isolator. pin 9 and pin 15 are interna lly connected to each other, and it is recommended that both pins be connected to a common ground. 10 v e2 data enable input. when this pin is high or no t connect ed , the secondary outputs are active; when this pin is low, the outputs are in a high - z state. 11 v sel output voltage selection. when v sel = v iso , the v iso setpoint is 5.0 v. when v sel = gnd iso , the v iso setpoint is 3.3 v. in slave regulation mode, this pin has no function. 13 v ob logic output b. 14 v oa logic output a. 16 v iso secondary supply voltage. output for secondary side isolated data channels and external loads. free datasheet http:///
adum6200/ADUM6201/adum6202 data sheet rev. c | page 12 of 28 v dd1 1 gnd 1 2 v ia 3 v ob 4 v iso 16 gnd iso 15 v oa 14 v ib 13 rc in 5 nc = no connect nc 12 rc se l 6 v se l 1 1 v e1 7 v e2 10 gnd 1 8 gnd iso 9 ADUM6201 t op view (not to scale) 08775-007 figure 7. ADUM6201 pin configur ation table 22. ADUM6201 pin function descriptions pin no. mnemonic description 1 v dd1 primary supply voltage, 3.0 v to 5.5 v. 2, 8 gnd 1 ground reference for the primary side of the isolator. pin 2 and pin 8 are internally connected to each other, and i t is recommended that both pins be connected to a common ground. 3 v ia logic input a. 4 v ob logic output b. 5 rc in regulation control input. this pin must be connected to the rc out pin of a master iso power device or tied low. this pin must not be tied h igh if rc sel is low; this combination causes excessive voltage on the secondary side of the isolator , damaging the ADUM6201 and possibly the devices that it powers. 6 rc sel control input. determines self - regul ation mode (rc sel high) or slave mode (rc sel low), allowing external regulation. this pin is weakly pulled to the high state. in noisy environments, tie this pin either high or low. 7 v e1 data enable input. when this pin is high or not connected, the prim ary output is active; when this pin is low, the output i s in a high - z state. 9, 15 gnd iso ground reference for the secondary side of the isolator. pin 9 and pin 15 are internally connected to each other, and it is recommended that both pins be connected t o a common ground. 10 v e2 data enable input. when this pin is high or not connected, the secondary output is active; when this pin is low, the output i s in a high - z state. 11 v sel output voltage selection. when v sel = v iso , the v iso setpoint is 5.0 v. wh en v sel = gnd iso , the v iso setpoint i s 3.3 v. in slave regulation mode, this pin has no function. 12 nc no internal connection. 13 v ib logic input b. 14 v oa logic output a. 16 v iso secondary supply voltage. output for secondary side isolated data chan nels and external loads. free datasheet http:///
data sheet adum6200/ADUM6201/adum6202 rev. c | page 13 of 28 v dd1 1 gnd 1 2 v oa 3 v ob 4 v iso 16 gnd iso 15 v ia 14 v ib 13 rc in 5 nc 12 rc sel 6 v sel 11 v e1 7 nc 10 gnd 1 8 gnd iso 9 adum6202 top view (not to scale) 08775-008 nc = no connect figure 8. adum6202 pin configuration table 23. adum6202 pin function descriptions pin no. mnemonic description 1 v dd1 primary supply voltage, 3.0 v to 5.5 v. 2, 8 gnd 1 ground reference for the primary side of the isolator. pin 2 and pin 8 are internally connected to each other, and it is recommended that both pins be connected to a co mmon ground. 3 v oa logic output a. 4 v ob logic output b. 5 rc in regulation control input. this pin must be connected to the rc out pin of a master iso power device or tied low. this pin must not be tied high if rc sel is low; this combination causes excess ive voltage on the secondary side of the isolator , damaging the adum6202 and possibly the devices that it powers. 6 rc sel control input. determines self - regulation mode (rc sel high) or slave mode (rc sel low) , allowing external regulation. this pin is weakly pulled to the high state. in noisy environments, tie this pin either high or low. 7 v e1 data enable input. when this pin is high or not connected, the primary output s are active; when this pin is low, the outputs are in a high - z state. 9, 15 gnd iso ground reference for the secondary side of the isolator. pin 9 and pin 15 are internally connected to each other, and it is recommended that both pins be connected to a common ground. 10, 12 nc no internal con nection. 11 v sel output voltage selection. when v sel = v iso , the v iso setpoint is 5.0 v. when v sel = gnd iso , the v iso setpoint is 3.3 v. in slave regulation mode, this pin has no function. 13 v ib logic input b. 14 v ia logic input a. 16 v iso secondary supply voltage. output for secondary side isolated data channels and external loads. truth table table 24. power control truth table (positive logic) rc sel input rc in input v sel input v dd1 input 1 v iso output operation h igh x h igh 5 v 5 v self - regulation mode, normal operation h igh x l ow 5 v 3.3 v self - regulation mode, normal operation h igh x l ow 3.3 v 3.3 v self - regulation mode, normal operation h igh x h igh 3.3 v 5 v this supply configuration is not recommended due to extremely poor efficiency l ow h igh x x x part runs at maximum open - loop voltage; damage can occur l ow l ow x x 0 v power supply disabled l ow rc out(ext) x x 1 x slave mode; rc out(ext) supplied by a master iso power device 1 v dd1 must be common between all iso powe r devices being regulated by a master iso power part. free datasheet http:///
adum6200/ADUM6201/adum6202 data sheet rev. c | page 14 of 28 typical performance characteristics 0 5 10 15 20 25 30 35 0 20406080100120 efficiency (%) i iso current (ma) 5.0v input/5.0v output 5.0v input/3.3v output 3.3v input/3.3v output 08775-124 figure 9. typical power supply efficiency in all supported power configurations 0 20 40 60 80 100 120 0 50 100 150 200 250 300 i iso current (ma) i dd1 current (ma) 0 8775-125 5.0v input/5.0v output 5.0v input/3.3v output 3.3v input/3.3v output figure 10. typical isolated output supply current vs. input current in all supported power configurations 0 200 400 600 800 1000 1200 0 20406080100120 total power dissip a tion (mw) i iso current (ma) 0 8775-126 5.0v input/5.0v output 5.0v input/3.3v output 3.3v input/3.3v output figure 11. typical total power dissipation vs. isolated output supply current in all supported power configurations 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 3.0 3.5 4.0 4.5 5.0 5.5 6.0 6.5 input supply voltage (v) input cur r ent (a) power (w) i dd1 power 0 8775-036 figure 12. typical short-circuit input current and power vs. v dd1 supply voltage time (ms) 0 40 4.6 4.8 5.0 5.2 5.4 20 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 v iso (v) i iso (ma) 10% load 90% load 10% load 08775-127 figure 13. typical v iso transient load response, 5 v output, 10% to 90% load step time (ms) 0 40 60 3.1 3.3 3.5 3.7 20 0 0.51.01.52.02.53.03.54.0 v iso (v) i iso (ma) 10% load 90% load 10% load 08775-128 figure 14. typical v iso transient load response, 3.3 v output, 10% to 90% load step free datasheet http:///
data sheet adum6200/ADUM6201/adum6202 rev. c | page 15 of 28 time (s) rc signal (v) v iso (v) 5.02 5.00 4.98 4.96 4.94 4.92 4.90 5.0 2.5 0 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 0 8775-129 figure 15. typical output voltage ripple at 90% load, v iso = 5 v time (s) rc signal (v) v iso (v) 3.34 3.30 3.32 3.28 3.26 4 2 0 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 08775-130 3.24 figure 16. typical output voltage ripple at 90% load, v iso = 3.3 v 0 1 2 3 4 5 6 7 ?1.0 ?0.5 0 0.5 1.0 1.5 2.0 2.5 3.0 v iso (v) time (ms) 90% load 10% load 08775-131 figure 17. typical output voltage start-up transient at 10% and 90% load, v iso = 5 v 0 1 2 3 4 5 ?1.0 ?0.5 0 0.5 1.0 1.5 2.0 2.5 3.0 v iso (v) time (ms) 90% load 10% load 08775-132 figure 18. typical output voltage start-up transient at 10% and 90% load, v iso = 3.3 v 0 4 8 12 16 20 051015 data rate (mbps) supply current (ma) 20 25 5.0v input/5.0v output 5.0v input/3.3v output 3.3v input/3.3v output 08775-041 figure 19. typical i chn supply current per forward data channel (15 pf output load) 0 4 8 12 16 20 051015 data rate (mbps) supply current (ma) 20 25 08775-042 5.0v input/5.0v output 5.0v input/3.3v output 3.3v input/3.3v output figure 20. typical i chn supply current per reverse data channel (15 pf output load) free datasheet http:///
adum6200/ADUM6201/adum6202 data sheet rev. c | page 16 of 28 051 01 5 data rate (mbps) supply current (ma) 20 25 5v 3.3v 0 2 1 3 4 5 08775-043 figure 21. typical i iso(d) dynamic supply current per input 0 1.0 0.5 1.5 2.0 2.5 3.0 051 01 5 data rate (mbps) supply current (ma) 20 25 5v 3.3v 08775-044 figure 22. typical i iso(d) dynamic supply current per output (15 pf output load) free datasheet http:///
data sheet adum6200/ADUM6201/adum6202 rev. c | page 17 of 28 terminology i dd1( q) i dd1(q) is the minimum operating current drawn at the v dd1 pin when there is no external load at v iso and the i/o pins are operating below 2 mbps, requiring no additional dynamic supply current. i dd1(q) reflects the minimum current operating condition. i dd1(d) i dd1( d ) is the typical input supply current with all channels simultaneously driven at a max imum data rate of 25 mbps with full capacitive load representing the maximum dynamic load conditions. resistive loads on the outputs should be treated separately from the dynamic load. i dd1( max ) i dd1 (max) is the input current under full dynamic and v iso load conditions. i i so(load) i is o(load) is the current available to the load. t phl propagation delay the t phl propagation delay is measured from the 50% level of the falling edge of the v ix signal to the 50% level of the falling edge of the v ox signal. t pl h propagation delay the t plh propagation delay is measured from the 50% level of the rising edge of the v ix signal to the 50% level of the rising edge of the v ox signal. propagation delay skew (t psk ) t psk is the magnitude of the worst - case difference in t p hl and/ or t plh that is measured between units at the same operating temperature, supply voltages, and output load within the recommended operating conditions. channel -to - channel matching (t pskcd /t pskod ) channel - to - channel matching is the absolute value of the difference in propagation delays between two channels when operated with identical loads. minimum pulse width the minimum pulse width is the shortest pulse wid th at which the specified pulse width distortion is guaranteed. maximum data rate the maximu m data rate is the fastest data ra te at which the specified pulse width distortion is guaranteed. free datasheet http:///
adum6200/ADUM6201/adum6202 data sheet rev. c | page 18 of 28 applications informa tion the dc - to - dc converter section of the adum620x works on principles that are common to most switching power supplies. it has a secondary side controller architecture with isolated pulse - width modulation (pwm) feedback. v dd1 power is supplied to an oscillating circuit that switches current into a chip scale air core transformer. power tra nsferred to the secondary side is rectified and regulated to either 3.3 v or 5 v. the secondary (v iso ) side controller regulates the output by creating a pwm control signal that is sent to the primary (v dd1 ) side by a dedicated i coupler data channel. the p wm modulates the oscillator circuit to control the power being sent to the secondary side. feedback allows for significantly higher power and efficiency. the adum620x implements undervoltage lockout (uvlo) wit h hysteresis on the v dd1 power input. this feature ensures that the converter does not enter oscillation due to noisy input power or slow power - on ramp rates. the adum620x can accept an external regulation con trol signal (rc in ) that can be connected to other iso power devices. this feature allows a single regulator to control multiple power modules without contention. when accepting control from a master power module, the v iso pins can be connected together , add ing their power. because there is only one feedback control path, the supplies work together seamlessly. the adum620x can only regulate itself or accept regulation (slave device) from another device in this pr oduct line; it cannot provide a regulation signal to other devices. pcb layout the adum620x digital isolators with 0.4 w iso power integrated dc - to - dc converter require no external interface circuitry for the l ogic interfaces. power supply bypassing is required at the input and output supply pins (see figure 23 ). note that low esr bypass capacitors are required between pin 1 and pin 2 and between pin 15 and pin 16, as close to the chip pads as possible. the power supply section of the adum620x uses a 180 mhz oscillator frequency to pass power efficiently through its chip scale transformers. in addition, the normal operati on of the data section of the i coupler introduces switching transients on the power supply pins. bypass capacitors are required for several operating frequencies. noise suppression requires a low induc - tance, high frequency capacitor, whereas ripple suppre ssion and proper regulation require a large value capacitor. these capacitors are most conveniently connected between pin 1 and pin 2 for v dd1 , and between pin 15 and pin 16 for v iso . to suppress noise and reduce ripple, a paralle l combination of at leas t two capacitors is required. the recommended capacitor values are 0.1 f and 10 f for v dd1 and v iso . the smaller capacitor must have a low esr; for example, use of a ceramic capacitor is advised. t he total lead length between the ends of the low esr ca pacitor and the input power supply pin must not exceed 2 mm . installing the bypass capacitor with traces more than 2 mm in length may result in data corruption. consider bypassing between pin 1 and pin 8 and between pin 9 and pin 16 unless both common grou nd pins are connected together close to the package . v dd1 by p ass < 2mm gnd 1 v ia /v oa v ib /v ob v iso gnd iso v oa /v ia v ob /v ib nc v se l rc in rc se l v e1 /nc v e2 /nc gnd 1 gnd iso 08775-020 figure 23 . recommended pcb layout in applications involving high common - mode transients, ensure that board coupling across the isol a tion barrier is minimized. furthermore, desi gn the board layout such that any coupling that does occur a f fects all pins equally on a given component side. failure to ensure this can cause voltage differential s between pins exceed ing the absolute maximum ratings for the device as specified in table 19, thereby leading to latch - up and/or permanent damage. the adum620x is a power device that dissipates approximately 1 w of power when fully loaded and running at max imum speed. because it is not possible to apply a heat sink to an isolation device, the device primarily depends on heat dissipation into the pcb through the gnd pins. if the device is used at high ambient temperatures, provide a thermal path from the gnd pins to the pcb ground plane. the board layout in figure 23 shows enlarged pads for pin 8 (gnd 1 ) and pin 9 (gnd iso ) . multiple vias should be implemented from the pad to the ground plane to significantly reduce the t emperature inside the chip. the dimensions of the expanded pads are at the discretion of the designer and depend on the available board space. start - up behavior the adum620x devices do not contain a soft start circuit. therefore, the start - up current and voltage behavior must be taken into account when designing with this device. when power is applied to v dd1 , the input switching circuit begins to operate and draw current when the uvlo minimum voltage is reache d. the switching circuit drives the maximum available power to the output until it reaches the regulation voltage where pwm control begins. the amount of current and the time required to reach regulation voltage depends on the load and the v dd1 slew rate. with a fast v dd1 slew rate (200 s or less), the peak current draws up to 100 ma/v of v dd1 . the input voltage goes high faster than the output can turn on, so the peak current is proportional to the maximum input voltage. free datasheet http:///
data sheet adum6200/ADUM6201/adum6202 rev. c | page 19 of 28 with a slow v dd1 slew rate (in the millisecond range), the input voltage is not changing quickly when v dd1 reaches the uvlo minimum voltage. the current surge is approximately 300 ma because v dd1 is nearly constant at the 2.7 v uvlo voltage. the behavior during startup is similar to when t he device load is a short circuit ; these values are consistent with the short - circuit current shown in figure 12. when starting the device for v iso = 5 v operation, do not limit the current available to the v dd1 po wer pin to less than 300 ma. the adum620x device s may not be able to drive the output to the regulation point if a current - limiting device clamps the v dd1 voltage during startup. as a result, the adum620x device s can draw large amounts of current at low voltage for extended periods of time. the output voltage of the adum620x devices exhibits v iso overshoot during start up. if this overshoot could potentially damage components attached to v iso , a voltage - limiting device such as a zener diode can be used to clamp the voltage. typical behavior is shown in figure 17 and figu re 18. emi considerations the dc - to - dc converter section of the adum620x device s must operate at 180 mhz to allow efficient power transfer through the small transformers. this creates high frequency currents that can propagate in circuit board ground and power planes, causing edge emissions and dipole radiation between the primary and secondary ground planes. grounded enclosures are recommended for applications that use these devices. if grounded enclosures ar e not possible, follow good rf design practices in the layout of the pcb. see the an - 0971 application note for board layout recommendations . propagation delay pa rameters propagation delay is a parameter that des cribes the time it takes a logic signal to propagate through a component. the propag a tion delay to a logic low output may differ from the propagation delay to a logic high output . input (v ix ) output (v ox ) t plh t phl 50% 50% 08775-118 figure 24 . propagation delay parameters pulse wid th distortion is the maximum difference between these two propagation delay values and is an indication of how acc u rately the timing of the input signal is preserved. channel - to - channel matching refers to the maximum amount that the propagation delay diffe rs between channels within a single adum620x component. propagation delay skew refers to the maximum amount th at th e propagation delay differs between multiple ad um620x components operating under the same conditions. dc correctness and m agnetic field immunity positive and negative logic transitions at the isolator input cause narrow (~1 ns) pulses to be sent to the decoder via the tran s former. the decoder is bis table and is, therefore, either set or reset by the pulses, indicating input logic transitions. in the absence of logic transitions at the input for more than 1 s, a per i odic set of refresh pulses indicative of the correct input state is sent to ensure d c correctness at the output. if the decoder receives no internal pulses for more than a pproximately 5 s, the input side is a s sumed to be unpowered or nonfunctional, and the isolator output is forced to a default state by the watchdog timer circuit . the li mitation on the magnetic field immunity of the adum620x is set by the condition in which induced voltage in the receiving coil of the transformer is sufficiently large to either falsely set or reset the decode r. the following analysis defines the conditions under which this may occur. the 3 .3 v operating condition of the adum620x is examined because it represents the most suscep - t ible mode of operation. the pulses at the transformer output have an amplitude greater than 1.0 v. the decoder has a sensing threshold at approximately 0.5 v, thus establishing a 0.5 v margin in which induced voltages can be tolerated. the voltage induced across the receiving coil is given by v = ( ?d /dt ) r n 2 ; n = 1, 2, , n where: is the magnetic flux density (gauss). r n is the radius of the n th turn in the receiving coil (cm). n is the total number of turns in the receiving coil. given the geometry of the receiving coil in the adum620x and an imposed requirement that the induced voltage be, at most, 50% of the 0.5 v margin at the decoder, a maximum allowable magnetic field is calculated as shown in figure 25. magnetic field frequency (hz) 100 maximum allowable magnetic flux density (kgauss) 0.001 1m 10 0.01 1k 10k 10m 0.1 1 100m 100k 08775-119 figure 25 . maximum allowable external magnetic flux density free datasheet http:///
adum6200/ADUM6201/adum6202 data sheet rev. c | page 20 of 28 for example, at a magnetic field frequency of 1 mhz, the maximum allowable magnetic field of 0.2 kgauss induces a voltage of 0.25 v at the receiving coil. this voltage is approxi - mately 50% of the sensing threshold and does not cause a faulty output transition. sim i larly, if such an event occurs during a transmitted pulse (and is of the worst - case polarity), it reduces the r e ceived pulse from >1.0 v to 0.75 v still well above the 0.5 v sensing threshold of the decoder. the preceding magnetic flux density values correspond to specific current magnitudes at given distances from the adum620x transformers. figure 26 expresses these allowable current magnitudes as a function of frequency for selected di s tances. as shown in figure 26 , the adum620x is ex tremely immune and can be affected only by extremely large currents operated at high frequency very cl ose to the component. for the 1 mhz example noted, a 0.5 ka current placed 5 mm away from the adum620x is r equired to affect the operation of the device . magnetic field frequency (hz) maximum allowable current (ka) 1000 100 10 1 0.1 0.01 1k 10k 100m 100k 1m 10m distance = 5mm distance = 1m distance = 100mm 08775-120 figure 26 . maximum allowable current for various current - to- adum620x spacings note that at combinations of strong magnetic field and hi gh frequency, any loops formed by pcb traces can induce error voltages sufficiently large to trigger the thresholds of succeeding circuitry. exercise care in the layout of such traces to avoid this possibility. power consumption the v dd1 power supply input provides power to the i coupler data channels as well as to the power converter. for this reason, the quiescent currents drawn by the data converter and the primary and secondary input/output channels cannot be determined separately. all of these quiescent power demands are combined into the i dd1(q) current shown in figure 27 . the total i dd1 supply current is the sum of the quiescent operating current, the dynamic current i dd1(d) demanded by the i/o channels, and an y external i iso load. converter prima r y i dd1(q) i iso i dd1(d) i ddp(d) i iso(d) converter seconda r y prima r y dat a i/o 2-channe l seconda r y dat a i/o 2-channe l 08775-021 figure 27 . power consumption within the adum620x both dynamic input and output current is consumed only when operating at channel speeds higher than the refre sh rate, f r . e ach channel has a dynamic current determined by its data rate . figure 19 shows the current for a channel in the forward direction, which means that the input is on the primary side of the part. figure 20 shows the current for a channel in the reverse direction, which means that the input is on the secondary side of the part. both figures assume a typical 15 pf load. t he following relation ship allows the total i dd1 current to be calculated: i dd1 = ( i iso v iso )/( e v dd1 ) + i chn ; n = 1 to 4 (1) where : i dd1 is the total supply input current. i iso is the current drawn by the secondary side external loads. e is the power supply efficiency at the maximum load from figure 9 at the v iso and v dd1 conditi on of interest. i chn is the current drawn by a single channel , determined from figure 19 or figure 20 , depending on channel direction. calculate the maximum external load by subtracting the dynamic output load from the maximum allowable load. i iso(load) = i iso(max) ? i iso(d)n ; n = 1 to 4 (2) where: i iso(load) is the current available to supply an external secondary side load. i iso(max) is the maximum external secondary side load current available at v iso . i iso(d)n is the dynamic load current drawn from v iso by an input or output channel, as shown in figure 19 and figure 20 for a typical 15 pf load . this analysis assumes a 15 pf capacitive load on each data output. if the capacitive load is larger than 15 pf, the a dditional current must be included in the analysis of i dd1 and i iso(load) . to determine i dd1 in equation 1, additional primary side dynamic output current (i aod ) is added directly to i dd1 . additional secondary side dynamic output current (i aod ) is added t o i iso on a per - channel basis. free datasheet http:///
data sheet adum6200/ADUM6201/adum6202 rev. c | page 21 of 28 to determine i iso(load) in equation 2, additional secondary side output current (i aod ) is subtracted from i iso(max) on a per - channel basis. for each output channel with c l greater than 15 pf, the additional capacitive s upply current is given by i aod = 0.5 10 ? 3 ( ( c l ? 15) v iso ) ( 2f ? f r ) ; f > 0.5 f r (3) where: c l is the output load capacitance ( pf ) . v iso is the output supply voltage ( v ) . f is the input logic signal frequency ( mhz ) ; it is half the input data rate expressed in units of mbps. f r is the inpu t channel refresh rate ( mbps ) . current - limit and thermal ov erload protection t he adum620x is protected against damage due to excessive power dissipation by thermal overload protection circuits. thermal overloa d protection limits the junction temperature to a maximum of 150c (typical). under extreme conditions (that is, high ambient temperature and power dissipation), when the junction temperature starts to rise above 150c, the pwm is turned off, turning off t he output current. when the junction temperature drops below 130c (typical), the pwm turns on again, restoring the output current to its nominal value. consider the case where a hard short from v iso to ground occurs. at first, the adum620x reaches its maximum current, which is proportional to the voltage applied at v dd1 . power dissipates on the primary side of the converter (see figure 12 ). if self - heating of the junction becomes grea t enough to cause its temperature to rise above 150c, thermal shutdown is activated , turning off the pwm and turning off the output current. as the junction temperature cools and drops below 130c, the pwm turns on and power dissipates again on the primar y side of the converter, causing the junction temperature to rise to 150c again. this thermal oscillation between 130c and 150c causes the part to cycle on and off as long as the short remains at the output. thermal limit protections are intended to pr otect the device against accidental overload conditions. for reliable operation, externally limit device power dissipation to prevent junction temperatures from exceeding 130c. power considerations the adum62 00/ ADUM6201 / adum6202 power input, data input channels on the primary side, and data input channels on the secondary side are all protected from premature opera tion by undervoltage lockout ( uvlo ) circuitry. below the minimum operating voltage, the power converte r holds its oscillator inactive, and all input channel drivers and refresh circuits are idle. outputs remain in a high impedance state to prevent transmis sion of undefined states during power - up and power - down operations. during application of power to v dd1 , the primary side circuitry is held idle until the uvlo preset voltage is reached. at that time, the data channels initialize to their default low out put state until they receive data pulses from the secondary side. when the primary side is above the uvlo threshold, the data input channels sample their inputs and begin sending encoded pulses to the inactive secondary output channels. the outputs on the primary side remain in their default low state because no data comes from the secondary side inputs until secondary side power is established. the primary side oscillator also begins to operate, transferring power to the secondary pow er circuits. the secon dary v iso voltage is below its uvlo limit at this point; the regulation control signal from the secondary side is not being generated. the primary side power oscillator is allowed to free run under these conditions , supplying the maximum amount of power to the secondary side . as the secondary side voltage rises to its regulation setpoint , a large inrush current transient is present at v dd1 . when the regulation point is reached, the regulation control circuit pro - duces the regulation control signal that mod ulates the oscillator on the primary side. the v dd1 current is then reduced and is proportional to the load current. the inrush current is less than the short - circuit current shown in figure 12 . the duration of the inrush current depends on the v iso loading conditions and on the current and voltage available at the v dd1 pin. as the secondary side converter begins to accept power from the primary, the v iso voltage starts to rise. when the secondary side uvlo is reach ed, the secondary side outputs are initialized to their default low state until data is received from the correspond - ing primary side input. it can take up to 1 s after the secondary side is initialized for the state of the o utput to correlate to the pri m ary side input. secondary side inputs sample their state and transmit it to the primary side. outputs are valid about 1 s after the secondary side becomes active. because the rate of charge of the secondary side power supply is dependent on loading condit ions, the input voltage, and the output voltage level selected, take care that the design allow s the con - verter sufficient time to stabilize before valid data is required. when power is removed from v dd1 , the primary side converter and coupler shut down wh en the uvlo level is reached. the secondary side stops receiving power and starts to discharge. the outputs on the secondary side hold the last state that they received from the primary side. either the uvlo level is reached and the outputs are placed in t heir high impedance state, or the outputs detect a lack of activity from the primary side inputs and the outputs are set to their default low value before the secondary power reaches uvlo. free datasheet http:///
adum6200/ADUM6201/adum6202 data sheet rev. c | page 22 of 28 thermal analysis the adum620x devices consist of four internal silicon die attached to a split lead frame with two die attach paddles. for the purposes of thermal analysis, the device is treated as a thermal unit with the highest junction temperature reflected in the ja value from table 14 . the value of ja is based on measurements taken with the part mounted on a jedec standard 4 - layer board with fine width traces and still air. under normal operating conditions, the adum620x operates at full load across the full temperature range without derating the output current. how - ever, following the recommendations in the pcb layout section dec reases the thermal resistance to the pcb , allowing increased thermal margin at high ambient temperatures. increasing available power the adum620x devices are designed to work in combination with the adum6000 in a master /slave configuration. the rc in and rc sel pins allow the adum620x to receive a pwm signal from an adum600 0 through its rc in pin and to act as a slave to that control signal. the rc sel pin chooses whether the part acts as a standalone , self - regulated device or a s a slave device. when the adum620x acts as a slave , its power is regulated by a pwm signal from a master device. this allows multiple iso power parts to be combined in parallel while sharing the load equally. when the adum620x is configured as a standalone uni t, it generates its own pwm feedback signal to regulate itself. the adum620x devices can function as slave or standalone devices. all devices in the adum5xxx and adum6xxx family can function as standalone devices. some of these devices also function as master devices or slave devices, but not both (see table 25). table 25. fu nction of iso power parts part no. function master slave standalone adum6000 yes yes yes adum620x no yes yes adum 640x no no yes adum5000 yes yes yes adum520x no yes yes adum5400 no no yes adum5401 to adum5404 yes no yes table 26 illustrates how iso power devices can provide many combinations of data channel co unt and multiples of the single - unit power. t able 26. configurations for power and data channels power units number of data channels 0 channels 2 channels 4 channels 1 - unit power adum6000 or adum5000 (standalone) adum620x or adum520x (standalone) adum5401 , adum5402 , adum5403 , adum5404 , or adum640x (standalone) 2 - unit power adum6000 or adum5000 (master) adum6000 or adum5000 (slave) adum6000 or adum5000 (master) adum620x or adum520x (slave) adum54 01, adum5402 , adum5403 , adum5404 (master) adum6000 or adum5000 (slave) 3 - unit power adum6000 or adum5000 (master) adum6000 or adum5000 (master) adum6000 or adum5000 (master) adum6000 or adum5000 (slave) adum6000 or adum5000 (slave) adum620x or adum520x (slave) adum6000 or adum5000 (slave) adum620x or adum520x ( slave) adum620x or adum520x (slave) free datasheet http:///
data sheet adum6200/ADUM6201/adum6202 rev. c | page 23 of 28 insulation lifetime all insulation structures eventually break down when subjected to voltage stress over a sufficiently long period. the rate of insu - lation degradation is dependent on the characteristics of the voltage waveform applied across the insulation. in addition to the testing performed by the regulatory agencies, analog devices carries out an extensive set of evaluations to determine the lif e - time of the insulation structure within the adum620x devices . analog devices performs accelerated life testing using voltage levels higher than the rated continuous working voltage. acce l- eration factors for several operating conditions are determined. these factors allow calculation of the time to failure at the actual working voltage. the values shown in table 20 summarize the peak voltage for 50 years of service life for a bipolar ac operating condition and the maximum csa/vde approved working vol - t ages. in many cases, the approved working voltage is higher than the 50- year service life voltage. operati on at these high working voltages can lead to shortened insulation life in some cases. the insulation lifetime of the adum620x devices depends on the voltage waveform type imposed across the isol a tion barrier. the i coupler insulation structure degrades at different rates depending on whether the waveform is bipolar ac, unipolar ac, or dc. figure 28, figure 29 , and figure 30 illustrate these different isolation voltage wav e forms. bipolar ac voltage is the most stringent environment. the goal of a 50 - year operating lifetime under the bipolar ac condition determines the maximum workin g voltage recommended by analog devices. in the case of unipolar ac or dc vo ltage, the stress on the insu - la tion is significantly lower. this allows operation at higher working voltages while still achieving a 50 - year service life. the working voltages listed in table 20 can be applied while maintaining the 50 - yea r minimum lifetime, provided that the voltage conforms to either the unipolar ac or dc voltage cases. any cross - insulation voltage waveform that does n ot conform to figure 29 or figure 30 should be treated as a bipolar ac wave - form and its peak voltage limited to the 50 - year lifetime voltage value listed in table 20 . the voltage presented in figure 29 is shown as sinusoidal for illustration purposes only. it is meant to represent any voltage waveform varying between 0 v and some limiting va lue. the limiting value can be positive or negative, but the voltage cannot cross 0 v. 0v rated peak voltage 08775-121 figure 28 . bipolar ac waveform 0v rated peak voltage 08775-122 figure 29 . unipolar ac waveform 0v rated peak voltage 08775-123 figure 30 . dc waveform free datasheet http:///
adum6200/ADUM6201/adum6202 data sheet rev. c | page 24 of 28 outline dimensions controlling dimensions are in millimeters; inch dimensions (in p arentheses) are rounded-off millimeter equiv alents for reference onl y and are not appropria te for use in design. compliant t o jedec st andards ms-013-aa 10.50 (0.4134) 10.10 (0.3976) 0.30 (0.01 18) 0.10 (0.0039) 2.65 (0.1043) 2.35 (0.0925) 10.65 (0.4193) 10.00 (0.3937) 7.60 (0.2992) 7.40 (0.2913) 0.75 (0.0295) 0.25 (0.0098) 45 1.27 (0.0500) 0.40 (0.0157) coplanarity 0.10 0.33 (0.0 130) 0.20 (0.0079) 0.51 (0.0201) 0.31 (0.0122) sea ting plane 8 0 1 6 9 8 1 1.27 (0.0500) bsc 03-27-2007-b figure 31 . 16 - lead standard small outline package [soic_w] wide body (rw - 16) dimensions shown in millimeters and (inches) controlling dimensions are in millimeters; inch dimensions (in p arentheses) are rounded-off millimeter equiv alents for reference onl y and are not appropria te for use in design. compliant t o jedec st andards ms-013-ac 10-12-2010-a 13.00 (0.51 18) 12.60 (0.4961) 0.30 (0.01 18) 0.10 (0.0039) 2.65 (0.1043) 2.35 (0.0925) 10.65 (0.4193) 10.00 (0.3937) 7.60 (0.2992) 7.40 (0.2913) 0.75 (0.0295) 0.25 (0.0098) 45 1.27 (0.0500) 0.40 (0.0157) coplanarity 0.10 0.33 (0.0130) 0.20 (0.0079) 0.51 (0.0201) 0.31 (0.0122) 8 0 1 6 9 8 1 1.27 (0.0500) bsc sea ting plane figure 32 . 16 - lead standard small outline package, with increas ed creepage [soic_ic] wide body (ri - 16 - 1) dimension s shown in millimeters and (inches) free datasheet http:///
data sheet adum6200/ADUM6201/adum6202 rev. c | page 25 of 28 ordering guide model 1 , 2 number of inputs, v dd1 side number of inputs, v iso side maximum data rate (mbps) maximum propagation delay, 5 v (ns) maximum pul se width distortion (ns) temperature range package description package option adum6200arwz 2 0 1 100 40 ?40c to +105c 16- lead soic_w rw - 16 adum6200crwz 2 0 25 70 3 ?40c to +105c 16 - lead soic_w rw - 16 adum6200ariz 2 0 1 100 40 ?40c to +105c 16- lead soic_ic ri - 16- 1 adum6200criz 2 0 25 70 3 ?40c to +105c 16- lead soic_ic ri - 16- 1 ADUM6201arwz 1 1 1 100 40 ?40c to +105c 16- lead soic_w rw - 16 ADUM6201crwz 1 1 25 70 3 ?40c to +105c 16- lead soic_w rw - 16 ADUM6201ariz 1 1 1 100 40 ?40c to +105c 16 - lead soic_ic ri - 16 - 1 ADUM6201criz 1 1 25 70 3 ?40c to +105c 16- lead soic_ic ri - 16- 1 adum6202arwz 0 2 1 100 40 ?40c to +105c 16- lead soic_w rw - 16 adum6202crwz 0 2 25 70 3 ?40c to +105c 16- lead soic_w rw - 16 adum6202ariz 0 2 1 100 40 ?40c to +105c 16- lead soic_ic ri - 16- 1 adum6202criz 0 2 25 70 3 ?40c to +105c 16- lead soic_ic ri - 16- 1 1 z = rohs co mpliant part. 2 tape and reel are available. the additional - rl suffix designates a 13 - inch (1,000 units) tape and reel option. free datasheet http:///
adum6200/ADUM6201/adum6202 data sheet rev. c | page 26 of 28 notes free datasheet http:///
data sheet adum6200/ADUM6201/adum6202 rev. c | page 27 of 28 note s free datasheet http:///
adum6200/ADUM6201/adum6202 data sheet rev. c | page 28 of 28 notes ? 2010 C 2012 analog devices, inc. all rights reserved. trademarks and registered trademarks are the property of their respective owners. d08775 - 0- 6/1 2(c) free datasheet http:///

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